Category: SRUP

IP core for MPA computations,

IP core for MPA computations

HPC, SRUP February 1, 2021 Conference: 2018 MIXDES - 25th International Conference "Mixed Design of Integrated Circuits and Systems" Publication date: 22 June 2018 DOI: 10.23919/MIXDES.2018.8436868 Access type: Paid Access (IEEE Xplore) Link: https://dx.doi.org/10.23919/MIXDES.2018.8436868   Abstract In this paper, we present an IP core of coprocessor...
FPGA implementation of the multiplication operation in multiple-precision arithmetic,

FPGA implementation of the multiplication operation in multiple-precision arithmetic

HPC, SRUP February 1, 2021 Conference: 2017 MIXDES - 24th International Conference "Mixed Design of Integrated Circuits and Systems" Publication date: 23 June 2017 DOI: 10.23919/MIXDES.2017.8005214 Access type: Paid Access (IEEE Xplore) Link: https://dx.doi.org/10.23919/MIXDES.2017.8005214   Abstract Although standard 32/64-bit arithmetic is sufficient to solve most...