Categories: HPC, mDLL
Journal: Computational Methods in Science and Technology
Publication date: 24 December 2018
DOI: 10.12921/cmst.2018.0000054
Access type: open
The designing, production and testing of the mDLL machine led to the development of such a structure in which operational cells (e.g. KDLL) were located in the nodes of a three-dimensional torus network and the device was scalable.
Categories: HPC, MPA
Conference: 2018 25th International Conference on Mixed Design of Integrated Circuits and System
Publication date: 16 August 2018
DOI: 10.23919/MIXDES.2018.8436868
Access type: paid (IEEE Xplore)
In this paper, we present an IP core of coprocessor supporting computations requiring integer multiple-precision arithmetic (MPA).
Categories: HPC, ARUZ
Journal: Computer Physics Communications
Publication date: 18 June 2018
DOI: 10.1016/j.cpc.2018.06.010
Access type: paid (ScienceDirect)
This paper presents general information about ARUZ, a scalable, fully parallel data processing system equipped with low-latency communication channels, designed for simulations of interactions among huge number of relatively simple elements.
Categories: HPC, mDLL
Journal: Przegląd Elektrotechniczny
Publication date: 15 November 2017
DOI: 10.15199/48.2017.11.34
Access type: open
W artykule opisano złożenia projektowe, budowę i realizację maszyny przeznaczonej do symulacji zjawisk zachodzących w wieloskładnikowych układach molekularnych.
Categories: HPC, MPA
Conference: 2017 24th International MIXDES Conference
Publication date: 10 August 2017
DOI: 10.23919/MIXDES.2017.8005214
Access type: paid (IEEEXplore)
In this contribution, our implementation of the base case-multiplication algorithm in MPA on FPGA is presented.